1. Field of the Invention
The present invention relates to a ferroelectric memory having a ferroelectric memory cell, and in particular, to a ferroelectric memory having a function which evaluates a polarized amount in a ferroelectric memory cell after data is written, and to a method of testing the same.
2. Description of the Related Art
The ferroelectric memory is known as a nonvolatile semiconductor memory storing the logical value data “0”, “1” as a polarized amount by using the hysteresis characteristic which a ferroelectric capacitor has. In order to evaluate the hysteresis characteristic of the ferroelectric capacitor, a predetermined data pattern is written after the ferroelectric memory is manufactured, and thereafter, the data pattern is read. Thereafter, by comparing the data pattern with the written data, the polarized amount in the ferroelectric memory cell is evaluated.
Conventionally, with respect to evaluation of a polarized amount of the ferroelectric memory cell, methods such as that described in, for example, U.S. Pat. No. 5,661,730 (Document 1), U.S. Pat. No. 5,991,189 (Document 2), U.S. Pat. No. 5,822,237 (Document 3), and Jpn. Pat. Appln. KOKAI Publication No. 2000-268599 (Document 4), are proposed.
The methods described in these documents are not structured such that the reading of the data is carried out immediately after data is written, or reading is carried out after a sufficient time after the data is written. Therefore, there is the possibility that the data is read before a sufficient attenuation of the polarized amount by depolarization arises. Further, even screening of the ferroelectric memory cell having the hysteresis characteristic in which a coercive voltage is small cannot be carried out.
FIG. 45 shows an example of an elapsed time variation characteristic by depolarization of a PZT (PbZrTiO3) film which is a type of ferroelectric. Note that this characteristic is described in, for example, J. Appl. Phys. 75(1), 1 Jan., 1994. In FIG. 45, the ordinate expresses a remaining polarized amount which is normalized, and the abscissa expresses elapsed time (seconds) from the time of writing the data to the time of reading the data.
As known from FIG. 45, after the data is written into the ferroelectric memory cell, a stoppage of attenuation of the polarized amount requires a wait of 10−3 to 100 (seconds). Namely, reading of the data from the ferroelectric memory cell in a state in which depolarization sufficiently arises requires waiting for a sufficient time after the writing. Accordingly, at the time of carrying out the test in which the data is read after being written, when an attempt is made to read the data after depolarization sufficiently has arisen, there is the problem that the cost required for the test increases.
Such a situation will be described by using a conventional testing method and the hysteresis characteristic of the ferroelectric memory cell.
FIG. 46 shows a flowchart of the testing method according to the invention described in U.S. Pat. No. 5,661,730. The testing methods are carried out in accordance with the following steps or sequences.
(1) Writing of an initial data pattern is carried out.
(2) Baking is carried out, namely, the memory cell is put at a high temperature place for a given time.
(3) The initial data pattern is read, and a defective cell (SS defect) is detected.
(4) Writing of an opposite data pattern which is a pattern opposite to the step (1): the initial data pattern is carried out.
(5) The opposite data pattern is read, and a defective cell (OS defect) is detected.
(6) Writing of the next data pattern is carried out.
(7) The above-described steps (2) to (6) are repeatedly carried out a large number of times while changing data patterns to be written.
Here, SS of the SS defect is the abbreviation of “same state”, and is used in the meaning that written data is read as is, and OS of the OS defect is the abbreviation of “opposite state”, and is used in the meaning that data which is opposite to the data written in a memory cell in advance is written, and the opposite data is read.
Here, if a sufficient time is not insured at the time of proceeding from step (4) to step (5), the polarized amount is read in a state in which depolarization is not sufficiently carried out.
Moreover, the above-described situation will be described by referring to FIGS. 47 and 48.
FIG. 47 shows a hysteresis characteristic curve of the ferroelectric memory cell (ferroelectric capacitor) in a state immediately after the opposite data pattern is written in step (4), i.e., before depolarization arises, in the test sequence shown in FIG. 46. Note that, in FIG. 47, VPL-VBL expresses an electric potential difference between plate lines and bit lines, and P expresses the polarized amount.
Here, it will be considered that a test on reading the opposite data pattern is carried out in step (6) in FIG. 46. In a case of the ferroelectric memory cell in which a long time is required for carrying out depolarization of the memory cell in which writing is carried out, as shown in FIG. 47, the remaining polarized amount is not attenuated yet at a point in time of reading the opposite data pattern, and, therefore, a high reading electric potential appears on the bit line.
On the other hand, in the ferroelectric memory cell in which depolarization is sufficiently carried out, as shown in FIG. 48, a low reading electric potential appears on the bit line. Note that Qsw in FIGS. 47 and 48 expresses a difference of the remaining polarized amounts of the written data “0” and “1”.
The polarization of the ferromagnetic memory cell is evaluated after performing the depolarization. It is then determined whether a sufficient sense margin remains even after the signal has decreased in magnitude. Here arises a problem. After the writing of data an excessively long time inevitably passes before it is can be confirmed that a sufficient sense margin remains. This would raise the test cost, as pointed out earlier.